Visual displays in computer systems, such as cathode ray tube (CRT) monitors, are typically driven from integrated circuits that are known as RAMDACs. Such circuits include memory elements for storing digitally encoded display control information, such as color intensity, along with digital-to-analog converters used to drive the monitor itself.
The quality of a color display on a computer screen is determined in part by two characteristics, spatial resolution and color depth. Spatial resolution (usually called simply "resolution") is herein defined as the number of distinct points or distinct pixels displayed (e.g., the number of pixels per inch or per centimeter) on a given area of the screen. Spatial resolution is typically measured in units of (distinct) "dots per horizontal display line". Thus, a higher resolution implies a greater the number of pixels of finer grain are displayed. "Color Depth" refers to the number of different colors that can be displayed on the screen at a given time. The greater the color depth, the more color information is stored for each pixel on the screen, resulting in a greater number of colors available for display.
The bitmapped graphics display subsystem of a typical computer system, shown in FIG. 1, includes a pixel clock generator 10 for generating clock signals on lines 11 and 12, a video display memory 20 for storing a frame of video data, a graphic controller 30 (such as a VGA or SVGA graphics controller), a RAMDAC 40 (which is the subject of the present invention) and a raster scan display monitor 50.
In a bitmapped graphics display subsystem such as the one shown in FIG. 1, higher resolution or greater color depth would require the use of more video memory. The "frame update rate" is equal to the number of times per second that the display is re-written, and thus is equal to the number of times per second that the entire frame buffer of video data must be accessed and displayed. For a given frame update rate, a higher resolution or greater color depth would also result in higher bandwidth requirements for the memory bus 21 and the pixel bus 31. For a given amount of video memory and bus bandwidth, there is a trade-off between resolution and color depth. That is, the greater the number of pixels (higher resolution) in a display, the less color information (color depth) can be stored for a given amount of frame buffer storage, and vice-versa.
A variety of display "modes" have been developed for driving color raster-scan displays that specify a particular resolution and a particular color depth. In general, the display modes are classified on the basis of the amount of color information used to generate an individual pixel. Some of these have become de facto standards. For example, in IBM-compatible personal computers two of the most commonly used color display modes are known as the "bypass 555" mode and the "pseudo-color" mode.
In pseudo-color mode, the color and intensity of each pixel is specified or selected by a 8-bit (i.e, one byte) quantity. The 8-bit quantity is used to address three color palette RAM (random access memory) arrays in the RAMDAC chip 40. The three color palette RAM arrays (also collectively called the color map RAM or the RAMDAC memory) contain the color information that is used to control the D/A converter, which in turn drives the red, green and blue signals of the CRT. In the pseudo-color mode only 256 different colors can be displayed on screen at one time, since eight bits can only specify 256 different RAM array address values.
The bypass 555 mode (also known as the TARGA format) has a color depth of 15 bits, allowing a large selection of colors to be displayed on a screen at once. In the bypass 555 mode each pixel is stored as a 16-bit value, with one bit being unused. In this mode, the RAMDAC memory is bypassed and three different sets of five bits from each 16-bit pixel are used to control each of the three D/A converters. In this mode there are 32 possible intensity levels for each of the three primary colors (red, green and blue) resulting in a total of 32768 different colors that can be displayed. Since almost twice as many bits of color data must be provided for each pixel (compared with the 8-bit of color information provided by each pixels in the pseudo-color mode), the resolution of the display is reduced by a factor of two for a pixel bus operating at the same data transfer rate used in the pseudo-color mode. Similarly, for a fixed amount of video memory that is sufficient to store the pixel data for only one display frame in pseudo-color mode, the resolution of the display is reduced by a factor of two when that same video memory is used with a display 50 operating in the bypass 555 mode.
Besides the bypass 555 mode, there are a variety of other display modes used by prior art bitmapped graphics system that provide more color depth than the pseudo-color mode. All of these display modes require more than eight bits of video data per pixel. For the remainder of this document, the bypass 555 mode and these other modes will be collectively referred to as "multicolor" modes.
To explain the relationship between displayed pixels and the utilization of display memory 20, FIGS. 2A-2D show examples of memory bitmaps for a display frame of four rows and four columns of pixels in various display modes. For the purposes of this discussion we will treat each 8-bit quantity stored in the display memory 20 as being stored at a distinct memory address. While most display memories are organized as 32-bit or 64-bit wide memories, each 8-bit byte quantity stored in the display memory 20 can be individually defined and updated by the computer system's CPU 72, and thus each 8-bit quantity can be individually "addressed", even if that address is identifies a certain portion of the 32-bit or 64-bit word at a particular memory address. Table 1 defines the pixel and video bit data labelling conventions used in FIGS. 2A-2D.
TABLE 1 ______________________________________ Key to Pixel and Bit Labels in FIGS. 2A-2D Symbol Description ______________________________________ P1, P2, . . . indicates a pseudo-color pixels; B1, B2, . . . indicates bypass 555 mode pixels; R indicates a red intensity bit value; G indicates a green intensity bit value; B indicates a blue intensity bit value; X indicates a "don't care" bit whose value is ignored; 1 enables bypass 555 display mode; and 0 enables pseudo-color display mode (or disables bypass mode). ______________________________________
In FIG. 2A, the pseudo-color information for each pixel is stored as an 8-bit quantity in video memory 20. FIG. 2B is an example of a memory bitmap for a 4 by 4 pixel frame in bypass 555 mode. Each pixel in FIG. 2B requires two bytes of memory in the video memory 20, and hence the size of the video memory required for this display mode is twice that required for pseudo-color mode. In addition, if the refresh rate is the same as that of the pseudo-color mode, the bandwidth of the video memory bus 21 must also be doubled.
A computer graphics system can be used to display text information, computer generated graphics like icon, still photography, full motion video, etc. Depending on the color content and the resolution requirement of the subject, different display modes may be suitable. For example, text information which has low color content should be displayed in pseudo-color mode for efficient memory usage and high spatial resolution, while motion video, which usually has a lower resolution requirement than that of text, should be displayed in a multicolor mode like the bypass 555 for more color content. In fact there is an increasing interest in being able to mix different color modes within the same screen for the display of different subjects.
A number of commercially available RAMDACs offer the capability to mix pseudo-color and multicolor modes on the same frame. However, prior art RAMDACs cannot change spatial resolution or, equivalently, the output pixel rate, on the fly and therefore the spatial resolution of the displayed image produced by those devices remain constants for the entire display screen. In addition, prior art RAMDACs require that the same amount of memory (e.g., two bytes per pixel) be used for all pixels in the display when mixing pseudo-color and multicolor modes in a single display frame. Thus, prior to the present invention, the normal trade-off between spatial resolution and color depth that applies when selecting pseudo-color mode or a multicolor mode for an entire display screen was not available when psuedocolor and multicolor modes were mixed in a single screen. As a result, in order to utilize the mixed mode of operation using prior art RAMDACs, the size of the video memory 20 must be double what would otherwise be needed.
FIG. 2C is an example of a bitmap for a 4 by 4 pixel frame in the prior-art mixed mode system where pseudo-color mode is mixed with a bypass 555 mode. Two bytes of data are required per pixel regardless of whether the display is in pseudo-color mode or bypass 555 mode. One bit out of the two bytes is used to signal whether the pair represents pseudo-color or bypass 555 information. If the bypass mode is indicated, the remaining 15 bits are read as bypass 555 color data. However, if the pseudo-color mode is indicated, then eight bits of the two bytes are used to address the RAM as in the pseudo-color mode and the remaining 7 bits are ignored. Since pseudo-color mode normally only requires one byte per pixel, both bus bandwidth and memory are not fully utilized when the system is switched into pseudo-color mode. The memory size and memory bus bandwidth requirements are the same as that of the bypass 555 mode and doubled when compared to pseudo-color mode. As shown in FIG. 2C, many "Don't Care" bits (indicated by X's) are stored in the video memory in order to achieve linear address mapping to pixel location, clearly indicating that large portions of the video memory are wasted for storing pseudo-color pixels.
It is an objective of this invention to provide a RAMDAC circuit that has the capability to display two or more modes of different color depth simultaneously in a single display frame and to switch its output pixel rate on-the-fly (at any position in a display image) according to the color depth of the pixel being displayed such that display data with lesser color depth and higher spatial resolution can be displayed along side display data with more color depth but lower spatial resolution.
It is another objective of this invention to use such a RAMDAC circuit to switch between a high-resolution graphics mode such as a 7-bit pseudo-color mode and multicolor mode such as the bypass 555 mode so as to allow for maximum resolutions in both modes for a given amount of video memory.
It is another objective of this invention to use such a RAMDAC chip to switch between a high-resolution graphics mode such as the 7-bit pseudo-color mode and multicolor mode such as the bypass 555 mode so as to allow for maximum and efficient usage of the display memory, for a consistent memory organization with linear address mapping and for reduction in bus bandwidth requirements.